{
  "schema_version": "1.6.1",
  "id": "RPI-CVE-2026-53045",
  "modified": "2026-10-09T11:39:44Z",
  "upstream": [
    "CVE-2026-53045"
  ],
  "published": "2026-06-24T16:31:02Z",
  "summary": "memory: tegra124-emc: Fix dll_change check",
  "details": "In the Linux kernel, the following vulnerability has been resolved:\n\nmemory: tegra124-emc: Fix dll_change check\n\nThe code checking whether the specified memory timing enables DLL\nin the EMRS register was reversed. DLL is enabled if bit A0 is low.\nFix the check.",
  "severity": [
    {
      "type": "CVSS_V3",
      "score": "CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H"
    }
  ],
  "affected": [
    {
      "package": {
        "ecosystem": "Raspberry Pi OS:12",
        "name": "linux"
      },
      "versions": [
        "1:6.1.47-1+rpt4"
      ],
      "ecosystem_specific": {
        "binaries": [
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-2712",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v6",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v7",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v7l",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v8",
            "binary_version": "1:6.1.47-1+rpt4"
          }
        ]
      },
      "database_specific": {
        "per_version": {
          "1:6.1.47-1+rpt4": {
            "linux_commit": "655fc658a15ae7a6f37103754adb39ba52a9a14e",
            "upstream_version": "6.1.47",
            "assessment": "commit ancestry (strak rule)",
            "upstream_fixed": "6.1.175",
            "compiled_filter": false
          }
        }
      }
    }
  ],
  "references": [
    {
      "type": "ADVISORY",
      "url": "https://www.cve.org/CVERecord?id=CVE-2026-53045"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/a85967331144fde9300be38bb44d2558eb6b742e"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/db0ae80865b515cc0b705c85877ec00f7eebe9fe"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/2369b1831161356e1bcb51385d3e532dc4fe2771"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/7e19e72f306484996c52ff96cc92f69b78ed5435"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/05f138fc7e27ee8e7a83ccf966c3fa26cda44dda"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/1793249c067a4b28e1aba0ad0e4d73aa9f9e165a"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/1ebbbef47d11cc90219c081492ccf995aaa3e9b3"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/9597ab9a8296ab337e6820f8a717ff621078b632"
    }
  ],
  "database_specific": {
    "source": "https://git.kernel.org/pub/scm/linux/security/vulns.git",
    "upstream_modified": "2026-08-05T13:16:28Z",
    "severity": {
      "source": "kernel CNA",
      "cvss_v3_score": 9.8,
      "cvss_v3_severity": "Critical",
      "scenario": "AV:N - On networked Tegra124 devices, unauthenticated remote traffic can induce memory/CPU load that drives ACTMON/devfreq EMC rate transitions into the vulnerable timing-change path.\nAC:L - Once running on an affected Tegra124 DDR3 configuration with timings that cross the DLL enable boundary, the attacker only needs to induce rate changes; there is no race or hard-to-control memory layout requirement.\nPR:N - The remote-load ACTMON/devfreq path has no authentication or privilege check before the vulnerable EMC clock transition is reached.\nUI:N - No victim action is required; rate changes are performed automatically by kernel power-management code in response to load.\nS:U - The impact remains within the same kernel-controlled system and does not cross a hypervisor, IOMMU, or separate security-authority boundary.\nC:H - The reversed DLL transition handling can misprogram DDR3 timing/state during EMC clock changes, creating system-wide DRAM corruption that may expose arbitrary kernel or process memory.\nI:H - Incorrect DRAM DLL sequencing can corrupt arbitrary memory contents, including kernel data or page tables, making high integrity impact defensible.\nA:H - Bad memory-controller timing during live DRAM operation can hang, panic, or otherwise crash the system."
    }
  }
}