{
  "schema_version": "1.6.1",
  "id": "RPI-CVE-2026-45862",
  "modified": "2026-10-09T11:39:44Z",
  "upstream": [
    "CVE-2026-45862"
  ],
  "published": "2026-05-27T12:19:29Z",
  "summary": "iommu/vt-d: Flush cache for PASID table before using it",
  "details": "In the Linux kernel, the following vulnerability has been resolved:\n\niommu/vt-d: Flush cache for PASID table before using it\n\nWhen writing the address of a freshly allocated zero-initialized PASID\ntable to a PASID directory entry, do that after the CPU cache flush for\nthis PASID table, not before it, to avoid the time window when this\nPASID table may be already used by non-coherent IOMMU hardware while\nits contents in RAM is still some random old data, not zero-initialized.",
  "severity": [
    {
      "type": "CVSS_V3",
      "score": "CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H"
    }
  ],
  "affected": [
    {
      "package": {
        "ecosystem": "Raspberry Pi OS:12",
        "name": "linux"
      },
      "versions": [
        "1:6.1.47-1+rpt4"
      ],
      "ecosystem_specific": {
        "binaries": [
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-2712",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v6",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v7",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v7l",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v8",
            "binary_version": "1:6.1.47-1+rpt4"
          }
        ]
      },
      "database_specific": {
        "per_version": {
          "1:6.1.47-1+rpt4": {
            "linux_commit": "655fc658a15ae7a6f37103754adb39ba52a9a14e",
            "upstream_version": "6.1.47",
            "assessment": "commit ancestry (strak rule)",
            "upstream_fixed": "6.1.165",
            "compiled_filter": false
          }
        }
      }
    }
  ],
  "references": [
    {
      "type": "ADVISORY",
      "url": "https://www.cve.org/CVERecord?id=CVE-2026-45862"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/cd75e77125c8a51754ca4cd60b4ca083ed735d1d"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/0616137b70e6d9a547d4b60df8e1b64e36d83661"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/36990407cdd257473607e33802d00e978af2759e"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/c93f23375d8c410954b0df825e814b632fd62b9d"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/5962c30a6f05ea1ab73f039e235bb30716243517"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/36244dfd3853f7bf89d03b8e90d56b23ce7fbc16"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/d15cda135148ea7ba929cfdbcf208182bc29a7aa"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/22d169bdd2849fe6bd18c2643742e1c02be6451c"
    }
  ],
  "database_specific": {
    "source": "https://git.kernel.org/pub/scm/linux/security/vulns.git",
    "upstream_modified": "2026-08-05T13:16:28Z",
    "severity": {
      "source": "kernel CNA",
      "cvss_v3_score": 7.8,
      "cvss_v3_severity": "High",
      "scenario": "AV:L - The vulnerable PASID-table allocation is reached locally via IOMMU domain attach (SVA bind through an accelerator device, or guest/IOMMUFD device setup) using syscalls/ioctls; there is no network-facing path to this code.\nAC:H - Exploitation requires non-coherent VT-d hardware and winning a nanosecond-scale cache-writeback race in which the IOMMU must read the entry before the CPU flushes the zeroes to RAM, with the stale data happening to form a usable present entry \u2014 conditions governed by microarchitectural timing the attacker cannot control.\nPR:L - An unprivileged local user with access to an SVA-capable accelerator device can drive `iommu_sva_bind_device` to trigger the PASID-table allocation while controlling the device's DMA; no real root is required.\nUI:N - The allocation and the device DMA are driven entirely by the attacker; no victim interaction is needed.\nS:C - The IOMMU enforces the DMA isolation boundary; using stale garbage PASID entries lets a device's DMA escape its assigned domain, impacting host physical memory in a different security authority \u2014 an IOMMU/DMA boundary bypass.\nC:H - A misdirected DMA translated through a garbage page table can read arbitrary host physical memory, yielding disclosure beyond the device's domain.\nI:H - The same misdirected DMA path provides write access to arbitrary host physical memory, allowing corruption of kernel data outside the device's intended domain.\nA:H - Garbage PASID entries can cause IOMMU faults, DMA failures, and memory corruption leading to oops/panic or device/system hangs."
    }
  }
}