{
  "schema_version": "1.6.1",
  "id": "RPI-CVE-2024-42279",
  "modified": "2026-10-09T11:39:44Z",
  "upstream": [
    "CVE-2024-42279"
  ],
  "published": "2024-08-17T09:11:20Z",
  "summary": "spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer",
  "details": "In the Linux kernel, the following vulnerability has been resolved:\n\nspi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer\n\nWhile transmitting with rx_len == 0, the RX FIFO is not going to be\nemptied in the interrupt handler. A subsequent transfer could then\nread crap from the previous transfer out of the RX FIFO into the\nstart RX buffer. The core provides a register that will empty the RX and\nTX FIFOs, so do that before each transfer.",
  "severity": [
    {
      "type": "CVSS_V3",
      "score": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H"
    }
  ],
  "affected": [
    {
      "package": {
        "ecosystem": "Raspberry Pi OS:12",
        "name": "linux"
      },
      "versions": [
        "1:6.1.47-1+rpt4"
      ],
      "ecosystem_specific": {
        "binaries": [
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-2712",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v6",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v7",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v7l",
            "binary_version": "1:6.1.47-1+rpt4"
          },
          {
            "binary_name": "linux-image-6.1.0-rpi3-rpi-v8",
            "binary_version": "1:6.1.47-1+rpt4"
          }
        ]
      },
      "database_specific": {
        "per_version": {
          "1:6.1.47-1+rpt4": {
            "linux_commit": "655fc658a15ae7a6f37103754adb39ba52a9a14e",
            "upstream_version": "6.1.47",
            "assessment": "commit ancestry (strak rule)",
            "upstream_fixed": null,
            "compiled_filter": false
          }
        }
      }
    }
  ],
  "references": [
    {
      "type": "ADVISORY",
      "url": "https://www.cve.org/CVERecord?id=CVE-2024-42279"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75"
    },
    {
      "type": "FIX",
      "url": "https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927"
    }
  ],
  "database_specific": {
    "source": "https://git.kernel.org/pub/scm/linux/security/vulns.git",
    "upstream_modified": "2026-08-05T11:52:36Z",
    "severity": {
      "source": "kernel CNA",
      "cvss_v3_score": 7.8,
      "cvss_v3_severity": "High",
      "scenario": "AV:L - The vulnerable `mchp_corespi_transfer_one()` path is entered from the SPI core, reachable locally through spidev ioctls (`SPI_IOC_MESSAGE`) or by driving any in-kernel SPI client; no network or physical access to the board is needed.\nAC:L - The attacker can reliably dirty the RX FIFO with back-to-back transfers (including transfers larger than the 32-byte FIFO that provoke `INT_RX_CHANNEL_OVERFLOW`, or aborted transfers), and the residue is sticky rather than probabilistic, so no condition outside the attacker's control is required.\nPR:L - Only ordinary local access to an SPI device node (commonly group-accessible on embedded platforms) or the ability to trigger an SPI client is needed; there is no capability check anywhere on the path from the ioctl to `transfer_one`.\nUI:N - The attacker issues the transfers themselves and the stale-FIFO condition persists on its own; no victim action is required.\nS:U - The impact stays within the kernel and the SPI controller managed by it; no VM, IOMMU, or sandbox boundary is crossed.\nC:H - Bytes clocked in during a previous transaction \u2014 from any device on the shared bus, including a TPM, secure element, or the boot/root SPI flash \u2014 are copied into the attacker's RX buffer, and the leak can be repeated indefinitely, so security-critical data transiting the bus can be siphoned across driver and process boundaries.\nI:H - Residue from the attacker's own transaction is prepended into the next client's `rx_buf`, and an attacker transacting with a readback-capable slave controls those bytes exactly, allowing chosen data to be injected into another driver's input \u2014 e.g. corrupting a secure-element/TPM response or data read from the root flash.\nA:H - The residue count never clears, so once the FIFO fills every subsequent transfer overflows and returns garbage, permanently breaking every device on the controller (rootfs SPI-NOR, watchdog, sensors) until reboot, with SPI core transfer timeouts and `dev_err` spam."
    }
  }
}